In modern digital integrated circuits, particularly those fabricated according to the well-known complementary metal-oxide-semiconductor (CMOS) technology, circuit operation often depends upon the availability of a stable reference voltage. For example, many functional circuits internal to an integrated circuit rely upon current sources that conduct a stable current. Examples of such functional circuits include differential amplifiers, current mirrors, operational amplifiers, level shift circuits, and circuits that themselves generate reference voltages. Since current sources are generally implemented by way of n-channel field effect transistors, the stability of the current source depends upon the stability of the reference voltage applied to the gate of the n-channel field effect transistor.
Referring now to FIG. 11, a conventional voltage reference generator circuit based on a current mirror is illustrated. The voltage reference circuit of FIG. 11 includes p-channel transistors 1, 3 connected in a current mirror fashion, with their sources biased to V.sub.cc and their gates connected together at the drain of transistor 1. The drain of transistor 1 is connected to the drain of n-channel transistor 7, which has its gate connected to receive a fraction of V.sub.cc determined by voltage divider 5. Transistors 1 and 7 constitute the reference leg of the current mirror. The drain of transistor 3 is connected to the drain and gate of an n-channel transistor 9, at which the reference voltage V.sub.ref is produced. Transistors 3 and 9 thus constitute the mirror leg of the current mirror, as the current conducted by transistor 3 "mirrors" that conducted by transistor 1. The sources of transistors 7, 9 are connected together to current source 11, which conducts a current i.sub.BIAS that, in this example, is the sum of the currents through the reference and mirror legs.
This conventional current mirror-based voltage reference circuit of FIG. 11 is beneficial in certain applications. For example, if transistors 3 and 9 are made to be quite large (i.e., channel width to channel length ratio being relatively large), the output impedance of the circuit of FIG. 11 will be quite low, allowing the circuit to source and sink relatively large currents without significant modulation in the voltage at line V.sub.ref. If such large source and sink currents are to be provided, however, it is preferable that the mirror ratio (i.e., ratio of the size of transistor 3 to that of transistor 1) be large, to reduce the DC current drawn by the circuit and to provide current amplification.
However, it has been observed that the circuit of FIG. 11 is subject to development of offset voltages therein. For example, if significant source current is required to be produced on line V.sub.ref, it has been found that the voltage at the drains of transistors 1 and 7 will drop since the current through transistor 9 is reduced to near zero (all of the current in the mirror leg being sourced to line V.sub.ref). Because of the small size of transistor 1 required for the mirror ratio to be large enough to provide the desired source current, and due to its diode configuration, transistor 1 is not able to rapidly pull up the node at its drain, which will in turn allow the voltage on line V.sub.ref to overshoot its desired voltage (transistor 3 being turned on relatively strongly). This overshoot on line V.sub.ref is undesirable when applied to circuits that rely upon a stable voltage on line V.sub.ref. Other circuits that may receive the voltage on line V.sub.ref may place significant sourcing or sinking current demands on line V.sub.ref, which will also undesirably affect the stable voltage.
In addition, because the current per unit channel width is different in the reference leg relative to the mirror leg, particularly as conducted by transistors 7 and 9, the voltage V.sub.ref can settle to an incorrect steady-state value.
Still further, it is desirable to provide as much current drive to the output of the voltage reference circuit as possible. However, while the source current provided by transistor 3 may be quite large (limited, of course, by the current mirror ratio), the sink current that may be conducted by transistor 9 is limited to the value i.sub.BIAS conducted by current source 11. As such, the output impedance for the sink situation will generally be limited by the value of current i.sub.BIAS that can be tolerated from a power dissipation standpoint.
It is therefore an object of the present invention to provide a voltage reference circuit that can source a relatively large current, while avoiding the development of an offset voltage therein.
It is another object of the present invention to provide such a circuit having improved transient response while maintaining a stable output reference voltage.
It is another object of the present invention to provide such a circuit which has improved switching performance.
It is another object of the present invention to provide such a circuit having a relatively low output impedance, such that modulation of the reference voltage is minimized when significant source and sink currents are demanded.
It is still a further object of the present invention to provide such a circuit in which the output impedance when a large sink current is demanded is not limited by the bias current source.
Other objects and advantages of the present invention will be apparent to those of ordinary skill in the art having reference to the following specification together with its drawings.